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This chapter explains the two separate DMX interfaces available on the CRMXchip.
SPI¶
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DMX data is available to be read over SPI. Thisapplies to both Null Start Code (NSC) data and Alternate Start Code(ASC) data.
DMX window¶
The DMX window feature allows a host CPU to set up a span of DMX slots(aka. a DMX window) that the host is interested of. This will reduce theload of the host since it does not need to buffer and parse the entireDMX frame.
Instead the host can get an interrupt request (DMX_CHANGED_IRQ) fromTiMo whenever data has changed inside the DMX window.
RX_DMX_IRQ is not affected by the settings of the DMX window.
Reading DMX data over SPI¶
When reading DMX data over SPI, the longest block of data possible toread is 128 bytes. If it is required to read more than 128 bytes thismust be done by performing multiple consecutive READ_DMX commandsequences.
The internal data block counter is reset when the end of the DMX windowis reached, or if any other command is being sent to the SPI slave.
Please note that RDM start code messages are not currently supportedover the SPI interface, so RDM communications shall be carried out overthe UART DMX/RDM interface (pins 8, 10, 11 and 12).
UART DMX interface¶
The UART DMX interface of the CRMXchip module consist of 4 digitalsignals that can be used to interface an RS485 driver IC compliant withthe ANSI E1.11 DMX512-A standard to facilitate a DMX512-A compatibleinterface. Please refer to the example schematic on page 7 for detailson how to connect an RS485 driver IC.
The DMX interface can also be used for CMOS/TTL level directlyinterfacing, for instance to a host CPU.
NOTE: Signal on RXD pin must NOT exceed 3.3V ! If 5V signal isused, a level shifting circuit must be used. Please see exampleschematics on page 7 for details on how to use a 5V IC.
DMX and RDM termination and line bias¶
DMX and RDM termination and line bias circuitry is not provided as partof CRMXchip (since the data is provided at TTL level). This circuit is leftto the device manufacturer to provide as required for each particularapplication and device.
Termination and line bias circuitry requirements shall follow ”ANSIE1.20 - 2006 / Entertainment Technology-RDM-Remote Device Managementover USITT DMX512 Networks” or later revisions.
IMPORTANT: Biasing is mandatory for all RDM implementations.
DMX frame rate and size¶
CRMXchip will auto sense the DMX frame rate and frame size and accept allvariations that are within the USITT DMX-512 (1986 & 1990) and DMX-512-Astandards.
Minimum DMX frame size is 1 slot and maximum is 512 slots.
Minimum DMX frame rate for normal operation is 0.8 frames per second andmaximum is 830 frames per second.
Input frame rates below 0.8 frames per second, i.e. more than 1.25s haselapsed since the start of the last frame, will be treated as a loss ofDMX. TiMo modules in receiver mode will set the RS485 driver IC to ahigh-impedance/tri-state mode until another DMX frame is detected. TiMoin transmitter mode will keep the RS485 driver in input mode.
CRMX will propagate DMX through the system maintaining the input framerate and frame size with the exception of frame rates that exceed thoseallowed by the DMX 512-A standard.
Input DMX frame rates above 830 frames per second will propagate throughthe system at 830 frames per second to ensure that the DMX output iscompliant with the DMX512-A standard.
DMX start code frames¶
DMX packets with start codes other than the DMX default 0x00 (also knownas the Null Start Code, or NSC) and the RDM start code (0xCC) will bepropagated through the system, and are subject to the same rules andlimitations as the null start code packets. Such frames are calledAlternate Start Code, or ASC, frames.
RDM start code frames¶
As CRMXchip does not support RDM, CRMXchip will ignore all packets with a Start Code of 0xCC.
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Alternate start code frames¶
ASC (Alternate Start Code) frames can be read separately from the SPIinterface or the DMX/RDM interface. Over SPI, the ASC_FRAME registercontains basic information about the last received ASC frame. Theinformation available in this register is start code and length (numberof slots).
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Reading ASC data over SPI¶
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When reading ASC data over SPI, the longest block of data possible toread is 128 bytes. If reading more than 128 bytes is required, thisis done by performing multiple consecutive READ_ASC commandsequences.
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The internal data block counter is reset when the end of the ASC frameis reached, or if any other command is being sent to the SPI slave.